indus t rial po wer c o ntrol eic e dr iv er ? high voltage gate driver ic datas h eet , 05.08. 2016 6e d f a mil y - 2 nd g e nera tion 3 phase 200 v and 600 v gate drive ic 6edl04i06pt 6EDL04I06NT 6edl04n06pt 6edl04n02pr eicedriver?
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eicedriver? 6ed family - 2nd generation datasheet 3 , 05.08.2016 revision history page or item su bjects (major changes since previous revision) , 05.08.2016 p. 15 increased the maximum operating ambient tem perature to 105 c p.2 update d disclaimer pp.12 delete links to application note p. 15 corrected parameter v ho in section 4.3 trademarks of infineon technologies ag aurix?, bluemoon?, c166 ?, canpak?, cipos?, cipurse?, comneon?, econopack?, coolmos?, coolset?, corecontrol?, crossave?, dave?, easypim?, econobridge?, econodual?, econopim?, eicedriver?, eupec?, fcos?, hitfet?, hybridpack?, i2rf?, isoface?, isopack?, mipaq?, modstack?, my - d?, no valithic?, omnitune?, optimos?, origa?, primarion?, primepack?, primestack?, pro - sil?, profet?, rasic?, reversave?, satric?, sieget?, sindrion?, sipmos?, smarti?, smartlewis?, solid flash?, tempfet?, thinq!?, trenchstop?, tricore?, x - gold?, x - pmu?, xmm?, x posys?. other trademarks advance design system? (ads) of agilent technologies, amba?, arm?, multi - ice?, keil?, primecell?, realview?, thumb?, vision? of arm limited, uk. autosar? is licensed by autosar development partnership. bluetooth? of bluetooth sig inc. cat - iq? of dect forum. colossus?, firstgps? of trimble navigation ltd. emv? of emvco, llc (visa holdings inc.). epcos? of epcos ag. flexgo? of microsoft corporation. flexray? is licensed by flexray consortium. hyperterminal? of hilgraeve incorporated. iec? of commission electrotechnique internationale. irda? of infrared data association corporation. iso? of international organization for standardization. matlab? of mathworks, inc. maxim? of maxim integrated products, inc. microtec?, nucleus? of mentor graphics corporation. mifare? of nxp. mipi? of mipi alliance, inc. mips? of mips technologies, inc., usa. murata? of murata manufacturing co., microwave office? (mwo) of applied wave research inc., omnivision? of omnivision technologies, inc. openwave? ope nwave systems inc. red hat? red hat, inc. rfmd? rf micro devices, inc. sirius? of sirius satellite radio inc. solaris? of sun microsystems, inc. spansion? of spansion llc ltd. symbian? of symbian software limited. taiyo yuden? of taiyo yuden co. teaklite? of ceva, inc. tektronix? of tektronix inc. toko? of toko kabushiki kaisha ta. unix? of x/open company limited. verilog?, palladium? of cadence design systems, inc. vlynq? of texas instruments incorporated. vxworks?, wind river? of wind river systems, inc. zetex? of diodes zetex limited . last trademarks update 2010 - 10 - 26
eicedriver? 6ed family - 2nd generation datasheet 4 , 05.08.2016 table of contents 1 overview ................................ ................................ ................................ ................................ ............. 7 2 blockdiagram ................................ ................................ ................................ ................................ ...... 9 3 pin configuration, description, and functionality ................................ ................................ ......... 11 3.1 low side and high side control pins (pin 2, 3, 4, 5, 6, 7) ................................ ................................ 11 3.2 en (gate driver enable, pin 10) ................................ ................................ ................................ ........ 12 3.3 /fault (fault feedback, pin 8) ................................ ................................ ................................ ........ 12 3.4 itrip and rcin (over - current detection function, pin 9, 11) ................................ ......................... 13 3.5 vcc, vss and com (low side supply, pin 1, 12,13) ................................ ................................ ...... 13 3.6 vb 1,2,3 and vs1,2,3 (high side supplies, pin 18, 20, 22, 24, 26, 28) ................................ ............. 13 3.7 lo1,2,3 and ho1,2,3 (low and high side outputs, pin 14, 15, 16, 19, 23, 27) ............................... 13 4 electrical parameters ................................ ................................ ................................ ....................... 14 4.1 absolute maximum ratings ................................ ................................ ................................ ............... 14 4.2 required operation conditions ................................ ................................ ................................ ........... 15 4.3 operating range ................................ ................................ ................................ ................................ 15 4.4 static logic function table ................................ ................................ ................................ ................... 16 4.5 static parameter s ................................ ................................ ................................ ............................... 16 4.6 dynamic parameters ................................ ................................ ................................ .......................... 19 5 timing diagrams ................................ ................................ ................................ ............................... 20 6 package ................................ ................................ ................................ ................................ ............. 23 6.1 pg - dso - 28 ................................ ................................ ................................ ................................ ........ 23 6.2 pg - tssop - 28 ................................ ................................ ................................ ................................ .... 24
eicedriver? 6ed family - 2nd generation datasheet 5 , 05.08.2016 list of figures figure 1 typical application ................................ ................................ ................................ ............................... 8 figure 2 block diagram for 6EDL04I06NT ................................ ................................ ................................ ......... 9 figure 3 block diagram for 6edl04i06pt, and 6edl04n06pt / 6edl04n02pr ................................ .......... 10 figure 4 pin configuration of 6ed family (s ignals hin1,2,3 and lin1,2,3 according to table 1) .................... 11 figure 5 input pin structure for negative logic (left) and positive logic (right) ................................ ................... 12 figure 6 input filter timing diagram for negative logic (left) and positive logic (right) ................................ ....... 12 figure 7 en pin structures ................................ ................................ ................................ ................................ 12 figure 8 /fault pin structures ................................ ................................ ................................ ........................ 13 figure 9 timing o f short pulse suppression (6EDL04I06NT) ................................ ................................ ........... 20 figure 10 timing of short pulse suppression (6edl04i06pt, 6edl04n06pt, 6edl04n02pr) ...................... 20 figure 11 timing of of internal deadtime (input logic according to table 1) ................................ ...................... 20 figure 12 enable delay time definition ................................ ................................ ................................ ............... 21 figure 13 input to output propagation delay times and switching times definition (6EDL04I06NT) .................. 21 figure 14 input to output propagation delay times and switching times definition (6edl04i06pt, 6edl04n06 pt, 6edl04n02pr) ................................ ................................ ................................ ....... 21 figure 15 operating areas (6EDL04I06NT, 6edl04i06pt) ................................ ................................ .............. 21 figure 16 operating areas (6edl04n06pt, 6edl04n02pr) ................................ ................................ ........... 22 figure 17 itrip - timing ................................ ................................ ................................ ................................ ...... 22 figure 18 package drawing ................................ ................................ ................................ ................................ 23 figure 19 pcb reference layout ................................ ................................ ................................ ......................... 23 figure 20 package drawing ................................ ................................ ................................ ................................ 24 figure 21 pcb reference layout (according to jedec 1s0p) left: reference l ayout right: detail of footprint 24
eicedriver? 6ed family - 2nd generation datasheet 6 , 05.08.2016 list of tables table 1 members of 6ed family C 2 nd generation ................................ ................................ ............................. 7 table 2 pin description ................................ ................................ ................................ ................................ ... 11 table 3 abs. maximum ratings ................................ ................................ ................................ ........................ 14 table 4 required operation conditions ................................ ................................ ................................ .......... 15 table 5 operating range ................................ ................................ ................................ ................................ . 15 table 6 static parameters ................................ ................................ ................................ ............................... 16 table 7 dynamic parameters ................................ ................................ ................................ .......................... 19 table 8 data of reference layout ................................ ................................ ................................ ..................... 24
eicedriver? 6ed family - 2nd generation datasheet 7 , 05.08.2016 eicedriver? 3 phase 200 v and 600 v gate drive ic 1 overview main features ? thin - film - soi - technology ? maximum blocking voltage +600v ? separate control circuits for all six drivers ? cmos and lsttl compatible input (negative logic) ? signal interlocking of every phase to prevent cross - conduction ? de tection of over current and under voltage supply ? externally programmable delay for fault clear after over current detection product highlights ? insensitivity of the bridge output to negative transient voltages up to - 50v given by soi - technology ? ultra fast bootstrap diodes ? 'shut down' of all switches during error conditions typical applications ? home appliances ? f ans, pumps ? general purpose drives product family table 1 members of 6ed family C nd generation sales name high side control input hin1,2,3 and lin1,2,3 t yp. uvlo - thresholds bootstrap diode package 6EDL04I06NT negative logic 11.7 v / 9.8 v yes dso28 6edl04i06pt positive logic 11.7 v / 9.8 v yes dso28 6edl04n06pt / 6edl04n02pr positive logic 9 v / 8.1 v yes dso28 / tssop28 description the device 6ed fa mily C 2 nd generation is a full bridge driver to control power devices like mos - transistors or igbts in 3 - phase systems with a maximum blocking voltage of +600 v. based on the used soi - technology there is an excellent ruggedness on transient voltages. no p arasitic thyristor structures are present in the device. hence, no parasitic latch - up may occur at all temperatures and voltage conditions. the six independent drivers are controlled at the low - side using cmos resp. lsttl compatible signals, down to 3.3 v logic. the device includes an under - voltage detection unit with hysteresis characteristic and an over - current detection. the over - current level is adjusted by choosing the resistor value and the threshold level at pin itrip. both error conditions (under - vo ltage and over - current) lead to a definite shut down off all six switches. an error signal is provided at the fault open drain output pin. the blocking time after over - current can be adjusted with an rc - network at pin rcin. the input rcin owns an internal current source of 2.8 a. therefore, the resistor r rcin is optional. the typical output current can be given with 165 ma for pull - up and 375 ma for pull down. because of system safety reasons a 310 ns interlocking time has been realised. the function of in put en can optionally be extended with an over - temperature detection, using an external ntc - resistor (see fig.1). the pg - dso28 pg - tssop28
eicedriver? 6ed family - 2nd generation datasheet 8 , 05.08.2016 monolithic integrated bootstrap diode structures between pins vcc and vbx can be used for power supply of the high side. signals hin1,2 ,3 and lin1,2,3 according to table 1 figure 1 typical application v c c f a u l t l i n 1 , 2 , 3 e n r c i n i t r i p v s s v b 1 , 2 , 3 h o 1 , 2 , 3 v s 1 , 2 , 3 l o 1 , 2 , 3 c o m t o l o a d v s s e n r r c i n c r c i n h i n 1 , 2 , 3 h i n 1 , 2 , 3 l i n 1 , 2 , 3 f a u l t v c c d c - b u s r s h 5 v
eicedriver? 6ed family - 2nd generation datasheet 9 , 05.08.2016 2 blockdiagram figure 2 block d iagram for 6EDL04I06NT v c c l o 1 l o 2 l o 3 c o m v s s s e t d o m i n a n t l a t c h s r q u v - d e t e c t b i a s n e t w o r k / v d d 2 d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n z d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n d e l a y d e l a y d e l a y v s s / c o m l e v e l - s h i f t e r v s s / c o m l e v e l - s h i f t e r v s s / c o m l e v e l - s h i f t e r g a t e - d r i v e g a t e - d r i v e g a t e - d r i v e > 1 i n p u t n o i s e f i l t e r l i n 3 i n p u t n o i s e f i l t e r h i n 3 i n p u t n o i s e f i l t e r l i n 2 i n p u t n o i s e f i l t e r h i n 2 i n p u t n o i s e f i l t e r l i n 1 v s 3 h o 3 v b 3 b i a s n e t w o r k / v b 3 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t v s 2 h o 2 v b 2 b i a s n e t w o r k - v b 2 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t v s 1 h o 1 v b 1 b i a s n e t w o r k - v b 1 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t g a t e - d r i v e i n p u t n o i s e f i l t e r h i n 1 f a u l t > 1 r c i n v d d 2 i r c i n i t r i p i n p u t n o i s e f i l t e r i n p u t n o i s e f i l t e r e n g a t e - d r i v e g a t e - d r i v e b o o t s t r a p d i o d e - v b 1 b o o t s t r a p d i o d e - v b 2 b o o t s t r a p d i o d e - v b 3
eicedriver? 6ed family - 2nd generation datasheet 10 , 05.08.2016 figure 3 block diagram for 6edl04i06pt, and 6edl04n06pt / 6edl04n02pr v c c l o 1 l o 2 l o 3 c o m v s s s e t d o m i n a n t l a t c h s r q u v - d e t e c t b i a s n e t w o r k / v d d 2 d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n z d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n d e a d t i m e & s h o o t - t h r o u g h p r e v e n t i o n d e l a y d e l a y d e l a y v s s / c o m l e v e l - s h i f t e r v s s / c o m l e v e l - s h i f t e r v s s / c o m l e v e l - s h i f t e r g a t e - d r i v e g a t e - d r i v e g a t e - d r i v e > 1 i n p u t n o i s e f i l t e r l i n 3 i n p u t n o i s e f i l t e r h i n 3 i n p u t n o i s e f i l t e r l i n 2 i n p u t n o i s e f i l t e r h i n 2 i n p u t n o i s e f i l t e r l i n 1 v s 3 h o 3 v b 3 b i a s n e t w o r k / v b 3 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t v s 2 h o 2 v b 2 b i a s n e t w o r k - v b 2 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t v s 1 h o 1 v b 1 b i a s n e t w o r k - v b 1 c o m p a r a t o r h v l e v e l - s h i f t e r + r e v e r s e - d i o d e l a t c h u v - d e t e c t g a t e - d r i v e i n p u t n o i s e f i l t e r h i n 1 f a u l t > 1 r c i n v d d 2 i r c i n i t r i p i n p u t n o i s e f i l t e r i n p u t n o i s e f i l t e r e n g a t e - d r i v e g a t e - d r i v e b o o t s t r a p d i o d e - v b 1 b o o t s t r a p d i o d e - v b 2 b o o t s t r a p d i o d e - v b 3
eicedriver? 6ed family - 2nd generation datasheet 11 , 05.08.2016 3 pin c onfiguration , d escription , and functionality figure 4 pin configuration of 6ed family (s ignals hin1,2,3 and lin1,2,3 according to table 1 ) table 2 x pin description symbol description vcc low side power supply vss logic ground hin1,2,3 high side logic input (positive or negative log ic according to table 1 ) lin1,2,3 low side logic input (positive or negative logic according to table 1 ) / fault indicates over - current and under - voltage (negative logic, open - drain output) en ena ble i/o functionality (positive logic) itrip analog input for over - current shut down, activates fault and rcin to vss rcin e xternal rc - network to define fault clear delay after fault - signal (t fltclr ) com low side gate driver reference vb1,2,3 high sid e positive power supply ho1,2,3 high side gate driver output vs1,2,3 high side negative power supply lo1,2,3 low side gate driver output nc not connected 3.1 low side and high side control pins (pin 2, 3, 4, 5, 6, 7) the schmitt trigger input threshold o f them are such to guarantee lsttl and cmos compatibility down to 3.3 v controller outputs. input schmitt trigger and noise filter provide beneficial noise rejection to short input pulses according to figure 5 and f igure 6 . 1 2 8 2 2 7 3 2 6 4 2 5 5 2 4 6 2 3 7 2 2 8 2 1 9 2 0 1 0 1 9 1 1 1 8 1 2 1 7 1 3 1 6 1 4 1 5 v c c v b 1 h i n 1 h o 1 h i n 2 v s 1 h i n 3 l i n 1 v b 2 l i n 2 h o 2 l i n 3 v s 2 f a u l t i t r i p v b 3 e n h o 3 r c i n v s 3 v s s c o m l o 1 l o 3 l o 2 n c n c n c
eicedriver? 6ed family - 2nd generation datasheet 12 , 05.08.2016 figure 5 input pin structure for negative logic (left) and positive logic (right) an internal pull - up of about 75 k ? (negative logic) pre - biases the input during supply start - up and a esd zener clamp is provided for pin protection purposes. the zener diodes are therefore designed for single pulse stress only and not for continuous voltage stress over 10v. for versions with positive, a 5 k ? pull - down resistor is used for this function. figure 6 input filter timing diagram for negative logic (left) and positive logic (right) it is anyway recommended for proper work of the driver not to provide input pulse - width lower than 1 s. the 6ed family C 2 nd generation provides additionally a shoot through prevention capability which avoids the simultaneous on - state of two channels of the same leg (i.e. ho1 and lo1, ho2 and lo2, ho3 and lo3). when two inputs of a same leg are activate d, only one leg output is activated, so that the leg is kept steadily in a safe state. a minimum dead time insertion of typ. 310 ns is also provided, in order to reduce cross - conduction of the external power switches. 3.2 en (gate driver enable, pin 10) the s ignal applied to pin en controls directly the output stages. all outputs are set to low, if en is at low logic level. the internal structure of the pin is given in figure 7 . t he switchin g levels of the schmitt - trigger are here v en,th+ = 2.1 v and v en,th - = 1.3 v. the typical propagation delay time is t en = 780 ns. the re is an intern al pull down resistor (75 k ? ), which keeps the gate outputs off in case of broken pcb connection. figure 7 en pin structures 3.3 /fault (fault feedback, pin 8) /fault pin is an active low open - drain output indicating the status of the gate driver (see figure 8 ). the pin is active (i.e. forces low voltage level) when one of the following conditions occur: ? under - voltage condition of vcc supply: in this case the fault condition is released as soon as the supply voltage condition returns in the normal operation range (please refer to vcc pin description for more details). ? over - current detection (itrip): the fault condition is latched until current trip condition is finished and rcin input is released (please refer to itrip pin). u z = 1 0 . 5 v i n p u t n o i s e f i l t e r v c c s c h m i t t - t r i g g e r s w i t c h l e v e l v i h ; v i l l i n x h i n x u z = 1 0 . 5 v i n p u t n o i s e f i l t e r s c h m i t t - t r i g g e r s w i t c h l e v e l v i h ; v i l l i n x h i n x ? ? k 5 l i n h i n h i n l i n h o l o h i g h l o w o n o f f o n t f i l i n t f i l i n o f f o n o f f l o h o a ) b ) l i n h i n h i n l i n h o l o h i g h l o w o n o f f o n t f i l i n t f i l i n o f f o n o f f l o h o a ) b ) v z = 1 0 . 5 v i n p u t n o i s e f i l t e r e n i e n + , i e n - v e n , t h + , v e n , t h - 6 e d f a m i l y C 2 n d g e n e r a t i o n
eicedriver? 6ed family - 2nd generation datasheet 13 , 05.08.2016 figure 8 /fault pin structures 3.4 itrip and rcin (over - current detection function, pin 9, 11) the 6ed family C 2 nd generation provides an over - current detection function by connecting the itrip input with the motor current feedback. the itrip comparator threshold (typ 0.44 v) is referenced to vss ground . a input noise filter (typ . t itripmin = 230 ns) prevents the driver to detect false over - current events. over - current detection generates a hard shut down of all outputs of the gate driver and provides a latched fault feedback at /fault pin. rcin input/ou tput pin is used to determine the reset time of the fault condition. as soon as itrip threshold is exceeded the external capacitor connected to rcin is fully discharged. the capacitor is then recharged by the rcin current generator when the over - current co ndition is finished. as soon as rcin voltage exceeds the rising threshold of typ v rcin,th = 5.2 v, the fault condition releases and the driver returns operational following the ontrol input pins according to section 3.1 . 3.5 vcc, vss and com (low side supply, pin 1, 12,13) vcc is the low side supply and it provides power both to input logic and to low side output power stage. input logic is referenced to vss ground as well as the under - voltage detection circuit. output power stage is referenced to com ground. com ground is floating respect to vss ground with a maximum range of operation of +/ - 5.7 v. a back - to - back zener structure protects grounds from noise spikes. the under - voltage circuit enables the device to operate at power on when a typical supply voltage higher than v ccuv+ is present. the ic shuts down all the gate drivers power outputs, when the vcc supply voltage is below v ccuv - = 9.8 v respectively 8.1 v. this prevents the external power switches from critically low gate v oltage levels during on - state and therefore from excessive power dissipation. 3.6 vb1,2,3 and vs1,2,3 (high side supplies, pin 18, 20, 22, 24, 26, 28) vb to vs is the high side supply voltage. the high side circuit can float with respect to vss following the e xternal high side power device emitter/source voltage. due to the low power consumption, the floating driver stage can be supplied by bootstrap topology connected to vcc. the device operating area as a function of the supply voltage is given in figure 15 and figure 16 . 3.7 lo1,2,3 and ho1,2,3 (low and high side outputs, pin 14, 15, 16, 19, 23, 27) low side and high side power outputs are specifically designed for pulse operation such as gate drive of ig bt and mosfet devices. low side outputs (i.e. lo1,2,3) are state triggered by the respective inputs, while high side outputs (i.e. ho1,2,3) are edge triggered by the respective inputs. in particular, after an under voltage condition of the vbs supply, a ne w turn - on signal (edge) is necessary to activate the respective high side output, while after a under voltage condition of the vcc supply, the low side outputs switch to the state of their respective inputs. f a u l t > 1 f r o m u v - d e t e c t i o n v c c r o n , f l t v d d f r o m i t r i p - l a t c h 6 e d f a m i l y C 2 n d g e n e r a t i o n
eicedriver? 6ed family - 2nd generation datasheet 14 , 05.08.2016 4 electrical parameters 4.1 absolute maximum ratings all voltages are absolute voltages referenced to v ss - potenti al unless otherwise specified. all parameters are valid for t a =25 c. table 3 abs. maximum ratings parameter symbol min. max. unit high side offset voltage (note 1 ) dso28 tssop28 v s v cc - v bs - 6 6 00 180 v high side offset voltage ( t p <500ns , note 1 ) v cc - v bs C C v b v cc C t p <500ns , note 1 ) v cc C C v b vs. v s ) (i nternally clamped) v bs - 1 20 high side output voltage ( v ho vs. v s ) v ho - 0.5 v b + 0.5 low side supply voltage (internally clamped) v cc - 1 20 low side supply voltage ( v cc vs. v com ) v ccom - 0.5 25 gate driver ground v com - 5.7 5.7 low side output volt age ( v lo vs. v com ) v lo - 0.5 v ccom + 0.5 input voltage lin,hin,en,itrip v in - 1 10 fault output voltage v flt - 0.5 v cc + 0.5 rcin output voltage v rcin - 0.5 v cc + 0.5 power dissipation (to package) note 2 dso28 tssop28 p d C C r th(j - a) C C t j C t s - 40 150 offset voltage slew rate ( note 3 ) d v s /dt 50 v/ns note :the minimu m value for esd immunity is 1.0kv (human body model). esd immunity inside pins connected to the low side (vcc, hinx, linx, fault, en, rcin, itrip, vss, com, lox) and pins connected inside each high side itself (vbx, hox, vsx) is guarant eed up to 1.5kv (hum an body model). note 1 : in case v cc > v b there is an additional power dissipation in the internal bootstrap diode between pins vcc and vbx. insensitivity of bridge output to negative transient voltage up to C 50v is not subject to production test C verifi ed by design / characterization. note 2: consistent power dissipation of all outputs . all parameters inside operating range. note 3: not subject of production test, verified by characterisation
eicedriver? 6ed family - 2nd generation datasheet 15 , 05.08.2016 4.2 required operation conditions all voltages are absolute vo ltages referenced to v ss - potential unless otherwise specified. all parameters are valid for t a =25 c. table 4 required operation conditions parameter symbol min. max. unit high side offset voltage (note 1 ) dso28 tssop28 v b 7 620 200 v low side sup ply voltage ( v cc vs. v com ) dso28 tssop28 v ccom 10 25 4.3 operating range all voltages are absolute voltages referenced to v ss - potential unless otherwise specified. all parameters are valid for t a =25 c. table 5 operating range parameter symbol min. m ax. unit high side floating supply offset voltage v s v cc - v bs - 1 500 v high side floating supply offset voltage ( v b vs. v cc , statically) v bcc - 1.0 500 high side floating supply voltage ( v b vs. v s , note 1) 6EDL04I06NT 6edl04i06pt v bs 13 17.5 6edl04 n06p t 6edl04n02pr 10 17.5 high side output voltage ( v ho vs. v s ) v ho 0 v bs low side output voltage ( v lo vs. v com ) v lo 0 v cc low side supply voltage 6EDL04I06NT 6edl04i06pt v cc 13 17.5 6edl04n06p t 6edl04n02pr 10 17.5 low side ground voltage v co m - 2.5 2.5 logic input voltages lin,hin,en,itrip ( note 2) v in 0 5 fault output voltage v flt 0 v cc rcin input voltage v rcin 0 v cc pulse width for on or off (note 3) t in 1 C t a - 40 10 5 c note 1 : logic operational for v b ( v b vs. v s ) > 7,0v note 2 : all input pins (hinx, linx) and en, itrip pin are internally clamped (see abs. maximum ratings) note 3 : in case of input pulse width at linx and hinx below 1 the input pulse may not be transmitted properly
eicedriver? 6ed family - 2nd generation datasheet 16 , 05.08.2016 4.4 static logic function table vcc vbs rcin itrip enable fault lo1,2,3 ho1,2,3 < v ccuv C v bsuv C ? v it,th+ 3.3 v 0 0 0 15v 15v > v rcin,th 0 3.3 v high imp lin1,2,3* hin1,2,3* 15v 15v > v rcin,th 0 0 high imp 0 0 * according to table 1 4.5 s tatic p arameters v cc = v bs = 15v unless otherwise specified. all parameters are valid for t a =25 c. table 6 static parameters parameter symbol values unit test condition min. typ. m ax. high level input voltage v ih 1.7 2.1 2.4 v low level input voltage v il 0.7 0.9 1.1 en positive going threshold v en,th+ 1.9 2.1 2.3 en negative going threshold v en,th - 1.1 1.3 1.5 itrip positive going threshold v it,th+ 380 445 510 mv i trip input hysteresis v it,hys 45 70 rcin positive going threshold v rcin,th - 5.2 6.4 v rcin input hysteresis v rcin,hys - 2.0 - input clamp voltage (hin and lin acc. table 1 , en, itrip) v in,clmap 9 10.3 12 i in = 4ma input clamp voltage at high impedance (/hin, /lin negative logic only) v in,float - 5.3 5.8 controller output pin floating high level output voltage lo1,2,3 ho1,2,3 v oh - - v c c - 0.7 v b - 0.7 v c c - 1.4 v b - 1.4 i o = 20ma low level output voltage lo1,2,3 ho1,2,3 v ol - - v com + 0.2 v s + 0.2 v com + 0.6 v s + 0.6 i o = - 20ma v cc and v bs supply undervoltage positive going threshold 6EDL04I06NT 6edl04i06pt v ccuv+ v bsuv + 11 11.7 12.5 6edl04n06p t 6edl04n02pr 8.3 9 9.8 v cc and v bs supply underv oltage negative going threshold 6EDL04I06NT 6edl04i06pt v ccuv C v bsuv C 9.5 9.8 10.8 v 6edl04n06p t 6edl04n02pr 7.5 8.1 8.8
eicedriver? 6ed family - 2nd generation datasheet 17 , 05.08.2016 table 6 static parameters parameter symbol values unit test condition min. typ. m ax. v cc and v bs supply undervoltage lockout hysteresis 6edl04i06p t 6edl04i06pt v ccuvh v bsuvh 1.2 1.9 - v 6edl04n06p t 6edl04n02pr 0.5 0.9 - high side leakage current betw. vs and vss i lvs+ 1 12.5 a v s = 600v high side leakage current betw. vs and vss i lvs+ 1 - 10 - t j = 125c, v s = 600v high side leakage current between vsx and vsy (x=1,2,3 and y=1,2,3) i lvs C 1 - 10 - t j = 125c v sx - v sy = 600v quiescent current v bs supply (vb only) i qbs1 - 210 400 ho=low quiescent current v bs supply (vb only) i qbs2 - 210 400 ho=high quiescent current v cc supply (vcc only) 6EDL04I06NT i qcc1 - 1.1 1.8 ma v lin =float. (all) v vsx =50v (only bootstrap types) 6edl04i06pt 6edl04n06pt 6edl04n02pr - 0.75 1.5 quiescent current v cc supply (vcc only) 6EDL04I06NT i qcc2 - 1.3 2 v lin =0, v hin =3.3 v v vsx =50v 6edl04i06pt 6edl04n06pt 6edl04n02pr 0.75 1.5 v lin =3.3 v, v hin =0 v vsx =50v quiescent current v cc supply (vcc only) 6EDL04I06NT i qcc3 - 1.3 2 v lin =3.3 v, v hin =0 v vsx =50v 6edl04i06pt 6edl04n06pt 6edl04n02pr 0.75 1.5 v lin =3.3 v, v hin =0 v vsx =50v input bias current 6EDL04I06NT i lin+ - 70 100 a v lin =3.3 v 6edl04i06pt 6edl04n06pt 6edl 04n02pr 400 700 1100 input bias current 6EDL04I06NT i lin - - 110 200 a v lin =0 6edl04i06pt 6edl04n06pt 6edl04n02pr 0 input bias current 6EDL04I06NT i h in+ - 70 100 v h in =3.3 v 6edl04i06pt 6edl04n06pt 6edl04n02pr 400 700 1100 input bias curr ent 6EDL04I06NT i h in - - 110 200 v h in =0 6edl04i06pt 6edl04n06pt 6edl04n02pr 0 input bias current (itrip=high) i itrip+ 45 120 v itrip =3.3 v input bias current (en=high) i en+ - 45 120 v enable =3.3 v input bias current rcin (internal current source ) i rcin 2.8 v rcin = 2 v 1 not subject of production test, verified by characterisation
eicedriver? 6ed family - 2nd generation datasheet 18 , 05.08.2016 table 6 static parameters parameter symbol values unit test condition min. typ. m ax. mean output current for load capacity charging in range from 3 v (20%) to 6 v (40%) i o+ 120 165 - ma c l =10 nf peak output current turn on (single pulse) i opk+ 1 240 r l = 0 ? t p <10 s mean output current for load capacity discharging in range fr om 12 v (80%) to 9 v (60%) i o - 250 375 - c l =10 nf peak output current turn off (single pulse) i opk - 1 420 r l = 0 ? t p <10 s bootstrap diode forward voltag e between vcc and vb v f,bsd - 1.0 1.3 v i f =0. 5 m a bootstrap diode forward current between vcc and vb i f,bsd 27 51 75 ma v f = 4 v bootstrap diode resistance r bsd 24 40 60 ? v f 1 = 4 v, v f 2 = 5 v rcin low on resistance of the pull down transistor r on,rcin - 40 100 v rcin =0.5 v fa ult low on resistance of the pull down transistor r on,flt - 45 100 v fault =0.5 v 1 not subject of production test, verified by characterisation
eicedriver? 6ed family - 2nd generation datasheet 19 , 05.08.2016 4.6 dynamic parameters v cc = v bs = 15 v , v s = v s s = v com unless otherwise specified. all parameters are valid for t a =25 c. table 7 dynamic parameters parameter symbol values unit tes t condition min. typ. max. turn - on propagation delay t on 400 530 800 ns v lin/hin = 0 or 3.3 v turn - off propagation delay 6EDL04I06NT 6edl04i06pt t off 360 490 760 6edl04n06p t 6edl04n02pr 400 530 800 turn - on rise time t r - 60 100 v lin/hin = 0 or 3.3 v c l = 1 nf turn - off fall time t f - 26 45 shutdown propagation delay enable t en - 780 1 1 00 v en =0 shutdown propagation delay itrip t itrip 400 670 1000 v itrip = 1 v input filter time itrip t itripmin 155 230 380 propagation delay itrip to f ault t flt - 420 700 input filter time at lin/hin for turn on and off t filin 120 300 - v lin/hin = 0 & 3.3 v input filter time en t filen 300 600 - fault clear time at rcin after itrip - fault, (c rcin =1nf) t fltclr 1.0 1.9 3.0 ms v lin/hin = 0 & 3.3 v v itrip = 0 dead time dt 150 310 - ns v lin/hin = 0 & 3.3 v matching delay on, max(ton) - min(ton), ton are applicable to all 6 driver outputs mt on - 20 100 external dead time > 500 ns matching delay off, max(toff) - min(toff), toff are applicable to all 6 driver outputs mt off - 40 100 external dead time >500 ns output pulse width matching. pw in - pw out 6EDL04I06NT 6edl04i06pt pm 40 100 pw in > 1 s 6edl04n06p t 6edl04n02pr 10 100
eicedriver? 6ed family - 2nd generation datasheet 20 , 05.08.2016 5 timing diagrams figure 9 timing of short pulse suppression (6edl04i06n t ) figure 10 timing of short pulse suppression (6edl04i06pt, 6edl04n06pt, 6edl04n02pr) figure 11 timing of of internal deadtime (input logic according to table 1 ) h i n / l i n h i n / l i n h o / l o h o / l o l o w t i n < t f i l i n t i n t i n > t f i l i n t i n t f i l i n h i n / l i n h i n / l i n h o / l o h o / l o h i g h t i n < t f i l i n t i n t i n > t f i l i n t i n t f i l i n h i n / l i n h i n / l i n h o / l o h o / l o l o w t i n < t f i l i n t i n t i n > t f i l i n t f i l i n t i n h i n / l i n h i n / l i n h o / l o h o / l o h i g h t f i l i n t i n < t f i l i n t i n t i n > t f i l i n t i n l i n 1 , 2 , 3 h i n 1 , 2 , 3 h o 1 , 2 , 3 l o 1 , 2 , 3 1 2 v 3 v 3 v 1 2 v 1 . 6 5 v 1 . 6 5 v d t d t
eicedriver? 6ed family - 2nd generation datasheet 21 , 05.08.2016 figure 12 enable delay time definition figure 13 input to output propagation delay tim es and switching times defi nition (6EDL04I06NT ) figure 14 input to output propagation delay times and switching times definition (6edl04i06pt, 6edl04n06pt, 6edl04n02pr) figure 15 operating areas (6edl0 4i06nt, 6edl04i06pt ) l o 1 , 2 , 3 t e n 3 v h o 1 , 2 , 3 e n l i n 1 , 2 , 3 h i n 1 , 2 , 3 h o 1 , 2 , 3 l o 1 , 2 , 3 1 . 6 5 v 1 . 6 5 v 1 2 v 3 v 3 v 1 2 v p w o u t t o n t o f f t r t f p w i n l i n 1 , 2 , 3 h i n 1 , 2 , 3 h o 1 , 2 , 3 l o 1 , 2 , 3 1 . 6 5 v 1 . 6 5 v 1 2 v 3 v 3 v 1 2 v p w o u t t o n t o f f t r t f p w i n o n o f f o n r e c o m m e n d e d a r e a o n f o r b i d d e n a r e a o n o n r e c o m m e n d e d a r e a o n o f f 2 0 1 7 . 5 1 3 1 1 . 7 9 . 8 v c c v b s t i c s t a t e v c c m a x , v b s m a x v c c u v + , v b s u v + v c c u v - , v b s u v - v
eicedriver? 6ed family - 2nd generation datasheet 22 , 05.08.2016 figure 16 operating areas (6edl04n06pt, 6edl04n02pr) figure 17 itrip - timing figure 18 itrip input t iming o n o f f o n r e c o m m e n d e d a r e a o n f o r b i d d e n a r e a o n o n r e c o m m e n d e d a r e a o n o f f 2 0 1 7 . 5 1 0 . 0 9 . 0 8 . 1 v c c v b s t i c s t a t e v c c m a x , v b s m a x v c c u v + , v b s u v + v c c u v - , v b s u v - v r c i n i t r i p 1 v f a u l t a n y o u t p u t v r c i n , t h 0 . 1 v 0 . 1 v t f l t c l r 0 . 5 v t f l t t i t r i p 3 v i t r i p / f a u l t h i g h t i n t i t r i p m i n t i n t i t r i p m i n t f l t c l r
eicedriver? 6ed family - 2nd generation datasheet 23 , 05.08.2016 6 package 6.1 pg - dso - 28 figure 19 package drawing dimensions 80.0 ? 80.0 ? 1.5 mm3 ? therm [ w/m ? k] material fr4 0.3 metal (copper) 70m 388 figure 20 pcb reference layout
eicedriver? 6ed family - 2nd generation datasheet 24 , 05.08.2016 6.2 pg - tssop - 28 footprint for reflow soldering e = 0.65 a = 6.10 l = 1.30 b = 0.40 figure 21 package drawing figure 22 pcb reference layout (according to jedec 1s0p) left: reference layout right: detail of footprint table 8 data of reference layout dimensions material metal (copper) 76.2 ? 114.3 ? 1.5 mm3 fr4 ( ? therm = 0.3 w/mk) 70m ( ? therm = 388 w/mk)
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